Strategies to Grow yourselves as DFT Engineer in VLSI ( For upcoming/Mid senior People) !!
This article is intended for people who have just started DFT engineering ( below 5 experience) or people who are going be DFT engineers soon. Also the information here would be relevant to people aspiring to be PD/STA engineers as well.
One thing which i observed over my years in VLSI is most of us are not aware of importance in learning basics properly since most of the students don't have luxury of studying in the premier colleges like IIT/NIT/BITS/VIT etc. Still our luck is we are able to carry on with our day to day tasks in the field of VLSI as an engineer. However knowing the things in granular level will make a HUGE impact once you reach mid level seniority like 5+ exp and that is time when you are (or may not depends on your quality of performance) involved in Architecture/Specifications related to particular projects being handled in Good Companies and we can't just escape from it and we need to face it, for that reason we need to know how VLSI testing happens at root level. I strongly recommend the below nptel Course from IIT Guhawati from Prof Mr. Santosh Biswas
https://nptel.ac.in/syllabus/106103016/ ( You can listen from Chapter 7 to the end in the curriculum)
Eventhough i am not mainstream DFT guy i have listened his videos and i strongly recommend people in field of DFT/STA/PD to start learning about VLSI Testing. Freshers who are looking for opportunities please take time in completing the courses ASAP, instead of spending hours together liking and commenting on the Posts from HRs in linkedin.
One more thing which really makes a difference in DFT domain is to learn STA and be an expert in timing analysis. Few of the Good books which i would suggest which i feel would be of great help for all.
- STA by J Bhaskar
- PrimeTime User Guide ( This is for people who wants to learn advanced stuff in Timing signoff)
People who are having accounts in cadence support/Solvent(From Synopsys) please start reading articles for improving your timing skills or DFT skills. The knowledge acquired from these support sites will really take you to the next Level.
Below is one important book to learn how constraints work and how we can improve or screw up the design provided we don't know how to constrain the design. This will definitely help you in owning DFT/Func mode constraints provided you are aware of the Chip Architectures ( DFT Architecture or Functional Architecture).
- Constraining-Designs-for-Synthesis-and-Timing-Analysis by Sanjay Churiwala and Sridhar Gangadharan
For the normal DFT related concepts below book will help your explore the beautiful world of DFT which provides unlimited learning Curve, where they have described all the important DFT concepts along with real world examples. Even though this book is not so easy to understand for entry level engineers. I would suggest for any doubts get in touch with Experienced DFT engineers in Linkedin and clarify your doubts. "I strongly feel if we dont understand what we do , better not to do it".
- VLSI Test Principles and Architectures: Design for Testability ( Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen )
Conclusion: This article is just to create awareness among students and entry level candidates and purely based on my limited knowledge and hopefully it will not hurt any one.
Even though the content here may not be suitable for all the audience i would request people who read this please share the post so that it might be of help for some genuine candidates who want to learn and improve their skill set !! Thank you very much #DFT#STA#PD
ASIC consultant engineer
2 年Thank you so much for sharing!
Staff Engineer at Synopsys
4 年That was really helpful. Thank you so much!
Student at NIT WARANGAL
5 年NPTEL link which you have given was changed .Can you kindly suggest the name of that course?
Deputy Manager at Bharat Electronics Limited,Hyderabad
5 年All the best anna ????
CEO at Siplont Systems
5 年Good initiative ??